Publications

Preprints

[Preprint 5]

Triton-distributed: Programming Overlapping Kernels on Distributed AI Systems with the Triton Compiler
Size Zheng, Wenlei Bao, Qi Hou, Xuegui Zheng, Jin Fang, Chenhui Huang, Tianqi Li, Haojie Duanmu, Renze Chen, Ruifan Xu, Yifan Guo, Ningxin Zheng, Ziheng Jiang, Xinyi Di, Dongyang Wang, Jianxi Ye, Haibin Lin, Li-Wen Chang, Liqiang Lu, Yun Liang, Jidong Zhai, Xin Liu. arXiv 2025 [PDF] [link]

[Preprint 4]

DeepSeek-V2: A Strong, Economical, and Efficient Mixture-of-Experts Language Model
DeepSeek-AI. arXiv 2024 [PDF] [link]

[Preprint 3]

ShadowKV: KV Cache in Shadows for High-Throughput Long-Context LLM Inference
Hanshi Sun, Li-Wen Chang, Wenlei Bao, Size Zheng, Ningxin Zheng, Xin Liu, Harry Dong, Yuejie Chi, Beidi Chen. arXiv 2024 [PDF] [link]

[Preprint 2]

ATOM: LOW-BIT QUANTIZATION FOR EFFICIENT AND ACCURATE LLM SERVING
Yilong Zhao, Chien-Yu Lin, Kan Zhu, Zihao Ye, Lequn Chen, Size Zheng, Luis Ceze, Arvind Krishnamurthy, Tianqi Chen, Baris Kasikci. arXiv 2023 [PDF] [link]

[Preprint 1]

HASCO: Towards Agile HArdware and Software CO-design for Tensor Computation
Qingcheng Xiao, Size Zheng, Bingzhe Wu, Pengcheng Xu, Xuehai Qian, Yun Liang. CoRR 2021 [PDF] [link]

Journals

[Journal 4]

MI-LLM: Multiplier-free LLM Inference on Commodity Processing-in-Memory Hardware
Puyun Hu, Minhui Xie, Linjiang Li, Kuiyaohui Zhang, Erge Xiang, Jing Wang, Size Zheng, Xiao Zhang, Yunpeng Chai. TC 2025 [PDF] [link]

[Journal 3]

Rubick: A Unified Infrastructure for Analyzing, Exploring, and Implementing Spatial Architectures via Dataflow Decomposition
Liqiang Lu, Zizhang Luo, Size Zheng, Jieming Yin, Jason Cong, Yun Liang, Jianwei Yin. TCAD 2023 [PDF] [link]

[Journal 2]

NeoFlow: A Flexible Framework for Enabling Efficient Compilation for High Performance DNN Training
Size Zheng, Renze Chen, Yicheng Jin, Anjiang Wei, Bingyang Wu, Xiuhong Li, Shengen Yan, Yun Liang. TPDS 2021 [PDF] [link]

[Journal 1]

Accelerating convolutional neural networks on FPGAs (中文)
Liqiang Lu, Size Zheng, Qingcheng Xiao, Deming Chen, Yun Liang. SCIENTIA SINICA Informationis 2019 [PDF] [link]

Conferences

[Conference 26]

DynaMo: Runtime Switchable Quantization for MoE with Cross-Dataset Adaptation
Zihao Zheng, Xiuping Cui, Size Zheng, Maoliang Li, Jiayu Chen, Yun Liang, Xiang Chen. DATE 2026 [PDF] [link]

[Conference 25]

LATIAS: A General Architecture-Operator Model for Spatial Accelerators with Complex Topology and Memory Hierarchy
Chengrui Zhang, Liancheng Jia, Chu Wang, Tianqi Li, Renze Chen, Xiuping Cui, Size Zheng, Shengen Yan, Xiuhong Li, Yu Wang, Xiang Chen, Yun Liang. DATE 2026 [PDF] [link]

[Conference 24]

MegaScale-MoE: Large-Scale Communication-Efficient Training of Mixture-of-Experts Models in Production
Chao Jin, Ziheng Jiang, Zhihao Bai, Zheng Zhong, Juncai Liu, Xiang Li, Ningxin Zheng, Xi Wang, Cong Xie, Qi Huang, Wen Heng, Yiyuan Ma, Wenlei Bao, Size Zheng, Yanghua Peng, Haibin Lin, Xuanzhe Liu, Xin Jin, Xin Liu. EuroSys 2026 [PDF] [link]

[Conference 23]

SnakeMan: Applying Relation-centric Notation to Model and Optimize Data Swizzle in the Cache of Modern NPU
Hanyu Zhang, Fangxu Guo, Liqiang Lu, Long Wang, Yunfei Du, Zhe Wang, Jinghan Zhang, Jie Zhang, Chenli Xue, Chengpeng Wu, Ziyi Zhang, Yun Liang, Size Zheng, Jianwei Yin. HPCA 2026 [PDF] [link]

[Conference 22]

TileLink: Generating Efficient Compute-Communication Overlapping Kernels using Tile-Centric Primitives
Size Zheng, Jin Fang, Xuegui Zheng, Qi Hou, Wenlei Bao, Ningxin Zheng, Ziheng Jiang, Dongyang Wang, Jianxi Ye, Haibin Lin, Li-Wen Chang, Xin Liu. MLSys 2025 [PDF] [link]

[Conference 21]

[Conference 20]

MxMoE: Mixed-precision Quantization for MoE with Accuracy and Performance Co-Design
Haojie Duanmu, Xiuhong Li, Zhihang Yuan, Size Zheng, Jiangfei Duan, Xingcheng Zhang, Dahua Lin. ICML 2025 [PDF] [link]

[Conference 19]

COMET: Fine-grained Computation-communication Overlapping for Mixture-of-Experts
Shulai Zhang, Ningxin Zheng, Haibin Lin, Ziheng Jiang, Wenlei Bao, Chengquan Jiang, Qi Hou, Weihao Cui, Size Zheng, Li-Wen Chang, Quan Chen, Xin Liu. MLSys 2025 [PDF] [link]

[Conference 18]

Qtenon: Towards Low-Latency Architecture Integration for Accelerating Hybrid Quantum-Classical Computing
Chenning Tao, Liqiang Lu, Size Zheng, Li-Wen Chang, Minghua Shen, Hanyu Zhang, Fangxin Liu, Kaiwen Zhou, Jianwei Yin. ISCA 2025 [PDF] [link]

[Conference 17]

DyREM: Dynamically Mitigating Quantum Readout Error with Embedded Accelerator
Kaiwen Zhou, Liqiang Lu, Hanyu Zhang, Debin Xiang, Chenning Tao, xinkui zhao, Size Zheng and Jianwei Yin. DAC 2025 [PDF] [link]

[Conference 16]

vMCU: Coordinated Memory Management and Kernel Optimization for DNN Inference on MCUs
Size Zheng, Renze Chen, Meng Li, Zihao Ye, Luis Ceze, Yun Liang. MLSys 2024 [PDF] [link]

[Conference 15]

ArkVale: Efficient Generative LLM Inference with Recallable Key-Value Eviction
Renze Chen, Zhuofeng Wang, Beiquan Cao, Tong Wu, Size Zheng, Xiuhong Li, Xuechao Wei, Shengen Yan, Meng Li, Yun Liang. NeurIPS 2024 [PDF] [link]

[Conference 14]

SpecPIM: Accelerating Speculative Inference on PIM-Enabled System via Architecture-Dataflow Co-Exploration
Cong Li, Zhe Zhou, Size Zheng, Jiaxi Zhang, Yun Liang, Guangyu Sun. ASPLOS 2024 [PDF] [link]

[Conference 13]

MAGIS: Memory Optimization via Coordinated Graph Transformation and Scheduling for DNN
Renze Chen, Zijian Ding, Size Zheng, Chengrui Zhang, Jingwen Leng, Xuanzhe Liu, Yun Liang. ASPLOS 2024 [PDF] [link]

[Conference 12]

MoteNN: Memory Optimization via Fine-grained Scheduling for Deep Neural Networks on Tiny Devices
Renze Chen, Zijian Ding, Size Zheng, Meng Li, Yun Liang. DAC 2024 [PDF] [link]

[Conference 11]

[Conference 10]

SpREM: Exploiting Hamming Sparsity for Fast Quantum Readout Error Mitigation
Hanyu Zhang, Liqiang Lu, Siwei Tan, Size Zheng, Jia Yu and Jianwei Yin. DAC 2024 [PDF] [link]

[Conference 9]

TileFlow: A Framework for Modeling Fusion Dataflow via Tree-based Analysis
Size Zheng, Siyuan Chen, Siyuan Gao, Liancheng Jia, Guangyu Sun, Runsheng Wang, Yun Liang. MICRO 2023 [PDF] [link]

[Conference 8]

Memory and Computation Coordinated Mapping of DNNs onto Complex Heterogeneous SoC
Size Zheng, Siyuan Chen, Yun Liang. DAC 2023 [PDF] [link]

[Conference 7]

Chimera: An Analytical Optimizing Framework for Effective Compute-intensive Operators Fusion
Size Zheng, Siyuan Chen, Peidi Song, Renze Chen, Xiuhong Li, Shengen Yan, Dahua Lin, Jingwen Leng, Yun Liang. HPCA 2023 [PDF] [link]

[Conference 6]

ARES: A Mapping Framework of DNNs towards Diverse PIMs with General Abstractions
Xiuping Cui, Size Zheng, Tianyu Jia, Le Ye and Yun Liang. ICCAD 2023 [PDF] [link]

[Conference 5]

Rubick: A Synthesis Framework for Spatial Architectures via Dataflow Decomposition
Zizhang Luo, Liqiang Lu, Size Zheng, Jieming Yin, Jason Cong, Jianwei Yin, Yun Liang. DAC 2023 [PDF] [link]

[Conference 4]

AMOS: Enabling Automatic Mapping for Tensor Computations On Spatial Accelerators with Hardware Abstraction
Size Zheng, Renze Chen, Anjiang Wei, Yicheng Jin, Qin Han, Liqiang Lu, Bingyang Wu, Xiuhong Li, Shengen Yan, Yun Liang. ISCA 2022 [PDF] [link]

[Conference 3]

HASCO: Towards Agile HArdware and Software CO-design for Tensor Computation
Qingcheng Xiao, Size Zheng, Bingzhe Wu, Pengcheng Xu, Xuehai Qian, Yun Liang. ISCA 2021 [PDF] [link]

[Conference 2]

FlexTensor: An Automatic Schedule Exploration and Optimization Framework for Tensor Computation on Heterogeneous System
Size Zheng, Yun Liang, Shuo Wang, Renze Chen, Kaiwen Sheng. ASPLOS 2020 [PDF] [link] [Google Scholar]

[Conference 1]

SuSy: A Programming Model for Productive Construction of High-Performance Systolic Arrays on FPGAs
Yi-Hsiang Lai, Hongbo Rong, Size Zheng, Weihao Zhang, Xiuping Cui, Yunshan Jia, Jie Wang, Brendan Sullivan, Zhiru Zhang, Yun Liang, Youhui Zhang, Jason Cong, Nithin George, Jose Alvarez, Christopher J. Hughes, Pradeep Dubey. ICCAD 2020 [PDF] [link]

At ByteDance Seed

First Author

[Preprint 1]

[Conference 1]

Co-Author

[Conference 4]

[Conference 3]

[Conference 2]

[Conference 1]

[Preprint 1]

At DeepSeek

Co-Author

[Preprint 1]

DeepSeek-V2: A Strong, Economical, and Efficient Mixture-of-Experts Language Model
DeepSeek-AI. arXiv 2024 [PDF] [link]

At University of Washington

Co-Author

[Conference 1]

[Preprint 1]

At Peking University

First Author

[Conference 6]

vMCU: Coordinated Memory Management and Kernel Optimization for DNN Inference on MCUs
Size Zheng, Renze Chen, Meng Li, Zihao Ye, Luis Ceze, Yun Liang. MLSys 2024 [PDF] [link]

[Conference 5]

TileFlow: A Framework for Modeling Fusion Dataflow via Tree-based Analysis
Size Zheng, Siyuan Chen, Siyuan Gao, Liancheng Jia, Guangyu Sun, Runsheng Wang, Yun Liang. MICRO 2023 [PDF] [link]

[Conference 4]

Memory and Computation Coordinated Mapping of DNNs onto Complex Heterogeneous SoC
Size Zheng, Siyuan Chen, Yun Liang. DAC 2023 [PDF] [link]

[Conference 3]

[Conference 2]

[Conference 1]

Co-Author

[Conference 10]

DynaMo: Runtime Switchable Quantization for MoE with Cross-Dataset Adaptation
Zihao Zheng, Xiuping Cui, Size Zheng, Maoliang Li, Jiayu Chen, Yun Liang, Xiang Chen. DATE 2026 [PDF] [link]

[Conference 9]

[Conference 8]

[Conference 7]

[Conference 6]

[Conference 5]

MoteNN: Memory Optimization via Fine-grained Scheduling for Deep Neural Networks on Tiny Devices
Renze Chen, Zijian Ding, Size Zheng, Meng Li, Yun Liang. DAC 2024 [PDF] [link]

[Journal 3]

[Conference 4]

ARES: A Mapping Framework of DNNs towards Diverse PIMs with General Abstractions
Xiuping Cui, Size Zheng, Tianyu Jia, Le Ye and Yun Liang. ICCAD 2023 [PDF] [link]

[Conference 3]

Rubick: A Synthesis Framework for Spatial Architectures via Dataflow Decomposition
Zizhang Luo, Liqiang Lu, Size Zheng, Jieming Yin, Jason Cong, Jianwei Yin, Yun Liang. DAC 2023 [PDF] [link]

[Preprint 1]

HASCO: Towards Agile HArdware and Software CO-design for Tensor Computation
Qingcheng Xiao, Size Zheng, Bingzhe Wu, Pengcheng Xu, Xuehai Qian, Yun Liang. CoRR 2021 [PDF] [link]

[Journal 2]

[Conference 2]

HASCO: Towards Agile HArdware and Software CO-design for Tensor Computation
Qingcheng Xiao, Size Zheng, Bingzhe Wu, Pengcheng Xu, Xuehai Qian, Yun Liang. ISCA 2021 [PDF] [link]

[Conference 1]

[Journal 1]

Accelerating convolutional neural networks on FPGAs (中文)
Liqiang Lu, Size Zheng, Qingcheng Xiao, Deming Chen, Yun Liang. SCIENTIA SINICA Informationis 2019 [PDF] [link]

As Independent Researcher

Co-Author

[Conference 4]

[Journal 1]

[Conference 3]

[Conference 2]

[Conference 1]

SpREM: Exploiting Hamming Sparsity for Fast Quantum Readout Error Mitigation
Hanyu Zhang, Liqiang Lu, Siwei Tan, Size Zheng, Jia Yu and Jianwei Yin. DAC 2024 [PDF] [link]

Si-Ze Zheng

Preprints

Journals

Conferences

At ByteDance Seed

First Author

Co-Author

At DeepSeek

Co-Author

At University of Washington

Co-Author

At Peking University

First Author

Co-Author

As Independent Researcher

Co-Author